Larsen&Toubro Ltd. Recruiting Experienced Candidates As "Virtual Prototyping Engineer (vlsi Domain)" Via Campus Drive | Register Now!
Larsen&Toubro Ltd. Recruiting Experienced Candidates As "Virtual Prototyping Engineer (vlsi Domain)" Via Campus Drive | Register Now!
Company bio: L and T is one of India's most regarded organizations, broadly respected for its innovative accomplishments, its expert worth frameworks and elevated expectations of corporate administration. The Company meets basic necessities in key divisions - foundation, oil and gas, power, petrochemical, substance, mining and common development. It maintains initiative in its significant lines of business through a client centered methodology, an inventive society and the capacity to react emphatically to testing prerequisites.
Set of working responsibilities:
Work Location - Bangalore (Will be Deputed to Customer Location)
Experience : 3 - 12 years
* Looking for hands-on prepared experts in ESL and EDA space.
* The essential employment capacities incorporate thinking of adaptable building show the whole way across the reflection levels : inexactly timed displaying to Approx. time displaying to Strict time demonstrating.
* Expert level learning in Virtual Prototyping with solid accentuation on C++/SystemC procedure, coding rules permitting first time-go on pre-silicon programming approval.
* Ability and adaptability to have the capacity to execute IP functionalities at different levels of reflection (that incorporates unit/group level/framework level).
* To have exhibited adaptability in coordinating programming debugger semantics on SystemC based virtual stages.
* Specify structural engineering model prerequisites to address the issues of both throughput and execution.
* Profile framework level models for execution enhancements and enhanced debuggability.
* Create an adaptable stage administration structure and process for keeping up different synchronous framework level models with shared parts.
* The employment additionally requires the capacity to characterize SW-HW parceling, characterize APIs, sharp investigating abilities on apparatuses like Virtualizer/Innovator.
*Drive the guarantees crosswise over with all the partner( (S/W and Core BSP groups) for quickening s/w approval on pre-silicon model structure Note - We don't require DV, RTL configuration experience we simply require Virtual prototyping knowledge - select involvement around there
Pay: Not Disclosed by Recruiter
Industry: Semiconductors/Electronics
Practical Area: Engineering Design, R&D
Part Category: Senior Design Engineer
Part: Senior Design Engineer
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Company bio: L and T is one of India's most regarded organizations, broadly respected for its innovative accomplishments, its expert worth frameworks and elevated expectations of corporate administration. The Company meets basic necessities in key divisions - foundation, oil and gas, power, petrochemical, substance, mining and common development. It maintains initiative in its significant lines of business through a client centered methodology, an inventive society and the capacity to react emphatically to testing prerequisites.Set of working responsibilities:
Work Location - Bangalore (Will be Deputed to Customer Location)
Experience : 3 - 12 years
* Looking for hands-on prepared experts in ESL and EDA space.
* The essential employment capacities incorporate thinking of adaptable building show the whole way across the reflection levels : inexactly timed displaying to Approx. time displaying to Strict time demonstrating.
* Expert level learning in Virtual Prototyping with solid accentuation on C++/SystemC procedure, coding rules permitting first time-go on pre-silicon programming approval.
* Ability and adaptability to have the capacity to execute IP functionalities at different levels of reflection (that incorporates unit/group level/framework level).
* To have exhibited adaptability in coordinating programming debugger semantics on SystemC based virtual stages.
* Specify structural engineering model prerequisites to address the issues of both throughput and execution.
* Profile framework level models for execution enhancements and enhanced debuggability.
* Create an adaptable stage administration structure and process for keeping up different synchronous framework level models with shared parts.
* The employment additionally requires the capacity to characterize SW-HW parceling, characterize APIs, sharp investigating abilities on apparatuses like Virtualizer/Innovator.
*Drive the guarantees crosswise over with all the partner( (S/W and Core BSP groups) for quickening s/w approval on pre-silicon model structure Note - We don't require DV, RTL configuration experience we simply require Virtual prototyping knowledge - select involvement around there
Pay: Not Disclosed by Recruiter
Industry: Semiconductors/Electronics
Practical Area: Engineering Design, R&D
Part Category: Senior Design Engineer
Part: Senior Design Engineer
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Drop Mail IDs and subscribe to get alerts via Email!